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The aarch64_simd_stp<mode> pattern uses w constraint in one alternative and r in another, but for the latter incorrectly uses <vw> iterator in %<vw>1 which expands to %d1 for V2DF and %s1 for V2SF and V4SF (this one not relevant to the pattern) and %w1 for others, so it ICEs if the alternative is selected during final. Compared to this, <vwcore> macro has the same values for all modes but uses w for V2DF and V2SF. 2023-11-24 Andrew Pinski <pinskia@gmail.com> Jakub Jelinek <jakub@redhat.com> PR target/109977 * config/aarch64/aarch64-simd.md (aarch64_simd_stp<mode>): Use <vwcore> rather than %<vw> for alternative with r constraint on input operand. * gcc.dg/pr109977.c: New test.
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