re PR target/27869 ("-O -fregmove" handles SSE scalar instructions incorrectly)

PR target/27869
	* config/i386/sse.md
	(sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
	(sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
	(sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
	(sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.

From-SVN: r123876
This commit is contained in:
Jan Hubicka
2007-04-16 18:07:19 +02:00
committed by Jan Hubicka
parent b3a8266ecc
commit a22491c19e
2 changed files with 13 additions and 56 deletions

View File

@@ -1,3 +1,12 @@
2007-04-16 Jan Hubicka <jh@suse.cz>
PR target/27869
* config/i386/sse.md
(sse_vmaddv4sf3, sse_vmmulv4sf3): Remove '%' modifier.
(sse_vmsmaxv4sf3_finite, sse_vmsminv4sf3_finite): Remove.
(sse2_vmaddv2df3, sse2_vmmulv2df3): Remove '%' modifier.
(sse2_vmsmaxv2df3_finite, sse2_vmsminv2df3_finite): Remove.
2007-04-16 H.J. Lu <hongjiu.lu@intel.com>
* Backport from mainline:

View File

@@ -304,7 +304,7 @@
(define_insn "sse_vmaddv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(plus:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
@@ -360,7 +360,7 @@
(define_insn "sse_vmmulv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(mult:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
@@ -492,19 +492,6 @@
[(set_attr "type" "sse")
(set_attr "mode" "V4SF")])
(define_insn "*sse_vmsmaxv4sf3_finite"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(smax:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE && flag_finite_math_only
&& ix86_binary_operator_ok (SMAX, V4SFmode, operands)"
"maxss\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_insn "sse_vmsmaxv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
@@ -547,19 +534,6 @@
[(set_attr "type" "sse")
(set_attr "mode" "V4SF")])
(define_insn "*sse_vmsminv4sf3_finite"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
(smin:V4SF (match_operand:V4SF 1 "nonimmediate_operand" "%0")
(match_operand:V4SF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE && flag_finite_math_only
&& ix86_binary_operator_ok (SMIN, V4SFmode, operands)"
"minss\t{%2, %0|%0, %2}"
[(set_attr "type" "sse")
(set_attr "mode" "SF")])
(define_insn "sse_vmsminv4sf3"
[(set (match_operand:V4SF 0 "register_operand" "=x")
(vec_merge:V4SF
@@ -1398,7 +1372,7 @@
(define_insn "sse2_vmaddv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(plus:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
@@ -1454,7 +1428,7 @@
(define_insn "sse2_vmmulv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(mult:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
@@ -1544,19 +1518,6 @@
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "*sse2_vmsmaxv2df3_finite"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(smax:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE2 && flag_finite_math_only
&& ix86_binary_operator_ok (SMAX, V2DFmode, operands)"
"maxsd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "DF")])
(define_insn "sse2_vmsmaxv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
@@ -1599,19 +1560,6 @@
[(set_attr "type" "sseadd")
(set_attr "mode" "V2DF")])
(define_insn "*sse2_vmsminv2df3_finite"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF
(smin:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "%0")
(match_operand:V2DF 2 "nonimmediate_operand" "xm"))
(match_dup 1)
(const_int 1)))]
"TARGET_SSE2 && flag_finite_math_only
&& ix86_binary_operator_ok (SMIN, V2DFmode, operands)"
"minsd\t{%2, %0|%0, %2}"
[(set_attr "type" "sseadd")
(set_attr "mode" "DF")])
(define_insn "sse2_vmsminv2df3"
[(set (match_operand:V2DF 0 "register_operand" "=x")
(vec_merge:V2DF