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Fix FAIL: gcc.target/i386/pr87007-5.c

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The following fixes the gcc.target/i386/pr87007-5.c testcase which
changed code generation again after the recent sinking improvements.
We now have

        vxorps  %xmm0, %xmm0, %xmm0
        vsqrtsd d2(%rip), %xmm0, %xmm0

and a necessary xor again in one case, the other vsqrtsd has
a register source and a properly zeroing load:

        vmovsd  d3(%rip), %xmm0
        testl   %esi, %esi
        jg      .L11
.L3:
        vsqrtsd %xmm0, %xmm0, %xmm0

the following patch adjusts the scan.

	* gcc.target/i386/pr87007-5.c: Update comment, adjust subtest.
This commit is contained in:
Richard Biener
2023-08-21 14:09:48 +02:00
parent e4e6a92407
commit 2eaebcf3df
1 changed files with 4 additions and 2 deletions
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6
gcc/testsuite/gcc.target/i386/pr87007-5.c
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@@ -1,6 +1,8 @@
/* { dg-do compile } */
/* { dg-options "-Ofast -march=skylake-avx512 -mfpmath=sse -fno-tree-vectorize -fdump-tree-cddce3-details -fdump-tree-lsplit-optimized" } */
/* Load of d2/d3 is hoisted out, vrndscalesd will reuse loades register to avoid partial dependence. */
/* Load of d2/d3 is hoisted out, the loop is split, store of d1 and sqrt
are sunk out of the loop and the loop is elided. One vsqrtsd with
memory operand needs a xor to avoid partial dependence. */
#include<math.h>
@@ -17,4 +19,4 @@ foo (int n, int k)
/* { dg-final { scan-tree-dump "optimized: loop split" "lsplit" } } */
/* { dg-final { scan-tree-dump-times "removing loop" 2 "cddce3" } } */
/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 0 } } */
/* { dg-final { scan-assembler-times "vxorps\[^\n\r\]*xmm\[0-9\]" 1 } } */