gcc/ChangeLog:
* config/loongarch/loongarch-opts.cc (loongarch_target_option_override):
Delete opts->x_flag_pcc_struct_return and enable mstrict-align by
default on LA32.
* config/loongarch/loongarch.cc (loongarch_for_each_saved_reg): Save reg
depend on float abi.
(loongarch_explicit_relocs_p): Disable explicit relocs on LA32.
(loongarch_valid_offset_p): Disable const_imm16_operand with 4 byte aligned.
(loongarch_valid_lo_sum_p): Allow lo_sum to be used with DF in ilp32d.
(loongarch_valid_index_p): Disable ADDRESS_REG_REG on LA32.
(loongarch_legitimize_address): Disable mem_shadd_or_shadd_rtx_p on LA32.
(loongarch_output_move_index): Assert TARGET_64BIT for ldx/stx.
(loongarch_output_move): Disable ldptr/stptr if offset is 0.
(loongarch_output_equal_conditional_branch): Disable beqz/bnez on LA32R.
(loongarch_trampoline_init): Change pcaddi to pcaddu12i.
(loongarch_get_separate_components): Disable ldptr/stptr on LA32.
(loongarch_c_mode_for_floating_type): Use TFmode for long double
regardless of target bitness.
(loongarch_bitint_type_info): Disable BitInt on LA32.
(loongarch_call_tls_get_addr): Use call30 on LA32.
(loongarch_split_move): Add split for DI, DF, TF.
* config/loongarch/loongarch.h (LA_LONG_DOUBLE_TYPE_SIZE): Set
LONG_DOUBLE_TYPE_SIZE to 128 regardless of target bitness.
(MAX_FIXED_MODE_SIZE): Set to 64 on LA32.
(DEFAULT_PCC_STRUCT_RETURN): New.
(STACK_BOUNDARY): Set to 128 on LA64 and LA32.
(LARCH_STACK_ALIGN): Set to 16 on LA64 and LA32.
(TRAMPOLINE_SIZE): Set to same value on LA64 and LA32.
include/ChangeLog:
* longlong.h (count_leading_zeros): Delete because LA32R no clz.
(count_trailing_zeros): Delete because LA32R no ctz.
(COUNT_LEADING_ZEROS_0): Delete.
Co-authored-by: Jiajie Chen <c@jia.je>
Reviewed-by: Xi Ruoyao <xry111@xry111.site>
Reviewed-by: Lulu Cheng <chenglulu@loongson.cn>
longlong.h for RISCV should define count_leading_zeros and
count_trailing_zeros and COUNT_LEADING_ZEROS_0 when ZBB is enabled.
The following patch patch fixes the bug reported in,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110181
The divdi3 on riscv32 with zbb extension generates __clz_tab
instead of genearating __builtin_clzll/__builtin_clz which is
not efficient since lookup table is emitted.
Updating longlong.h to use this __builtin_clzll/__builtin_clz
generates optimized code for the instruction.
PR target/110181
include/ChangeLog
* longlong.h [__riscv] (count_leading_zeros): Define.
[__riscv] (count_trailing_zeros): Likewise.
[__riscv] (COUNT_LEADING_ZEROS_0): Likewise.
xstormy16 has failed since the c99 transition due to a missing prototype for
__clzhi2 in the implementation of stormy16_count_leading_zeros.
This fixes the missing prototype. Pushed to the trunk.
include/
* longlong.h (__stormy16_count_leading_zeros): Add prototype for
__clzhi2.
LoongArch always support clz and ctz instructions, so we can always use
__builtin_{clz,ctz} for count_{leading,trailing}_zeros. This improves
the code of libgcc, and also benefits Glibc once we merge longlong.h
there.
Bootstrapped and regtested on loongarch64-linux-gnu.
include/ChangeLog:
* longlong.h [__loongarch__] (count_leading_zeros): Define.
[__loongarch__] (count_trailing_zeros): Likewise.
[__loongarch__] (COUNT_LEADING_ZEROS_0): Likewise.
