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0f77d88fdf
At tree level, the addr ref is also required for array dummy arguments, contrary to C; the GOMP_interop calls in modify_call_for_omp_dispatch were updated accordingly (using build_fold_addr_expr). As the GOMP_interop calls had no location data associated with them, the init call happened as soon as executing the previous line of code, which was confusing; solution: use the location data of the function call itself. PR middle-end/119662 gcc/ChangeLog: * gimplify.cc (modify_call_for_omp_dispatch): Fix GOMP_interop arg passing; add location info to function calls. libgomp/ChangeLog: * testsuite/libgomp.c/append-args-fr-1.c: New test. * testsuite/libgomp.c/append-args-fr.h: New test. gcc/testsuite/ChangeLog: * c-c++-common/gomp/append-args-interop.c: Update for fixed GOMP_interop call. * g++.dg/gomp/append-args-8.C: Likewise. * gfortran.dg/gomp/append-args-interop.f90: Likewise.
306 lines
10 KiB
C
306 lines
10 KiB
C
#include <assert.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <omp.h>
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#include "../libgomp.c-c++-common/on_device_arch.h"
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/* Provides: */
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#define DEFAULT_DEVICE -99
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void check_host (omp_interop_t obj);
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void check_nvptx (omp_interop_t obj, int dev, omp_interop_fr_t expected_fr, _Bool is_targetsync);
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void check_gcn (omp_interop_t obj, int dev, omp_interop_fr_t expected_fr, _Bool is_targetsync);
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/* The following assumes that when a nvptx device is available,
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cuda/cuda_driver/hip are supported.
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And that likewise when a gcn device is available that the
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plugin also can not only the HSA but also the HIP library
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such that hsa/hip are supported.
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For the host, omp_interop_none is expected.
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Otherwise, it only does some basic tests without checking
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that the returned result really makes sense. */
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void check_type (omp_interop_t obj)
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{
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const char *type;
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type = omp_get_interop_type_desc (obj, omp_ipr_fr_id);
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if (obj != omp_interop_none)
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assert (strcmp (type, "omp_interop_t") == 0);
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else
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assert (type == NULL);
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type = omp_get_interop_type_desc (obj, omp_ipr_fr_name);
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if (obj != omp_interop_none)
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assert (strcmp (type, "const char *") == 0);
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else
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assert (type == NULL);
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type = omp_get_interop_type_desc (obj, omp_ipr_vendor);
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if (obj != omp_interop_none)
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assert (strcmp (type, "int") == 0);
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else
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assert (type == NULL);
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type = omp_get_interop_type_desc (obj, omp_ipr_vendor_name);
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if (obj != omp_interop_none)
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assert (strcmp (type, "const char *") == 0);
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else
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assert (type == NULL);
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type = omp_get_interop_type_desc (obj, omp_ipr_device_num);
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if (obj != omp_interop_none)
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assert (strcmp (type, "int") == 0);
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else
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assert (type == NULL);
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if (obj != omp_interop_none)
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return;
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assert (omp_get_interop_type_desc (obj, omp_ipr_platform) == NULL);
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assert (omp_get_interop_type_desc (obj, omp_ipr_device) == NULL);
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assert (omp_get_interop_type_desc (obj, omp_ipr_device_context) == NULL);
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assert (omp_get_interop_type_desc (obj, omp_ipr_targetsync) == NULL);
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}
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void
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check_host (omp_interop_t obj)
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{
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assert (obj == omp_interop_none);
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check_type (obj);
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}
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void
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check_nvptx (omp_interop_t obj, int dev, omp_interop_fr_t expected_fr, _Bool is_targetsync)
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{
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assert (obj != omp_interop_none && obj != (omp_interop_t) -1L);
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omp_interop_rc_t ret_code = omp_irc_no_value;
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omp_interop_fr_t fr = (omp_interop_fr_t) omp_get_interop_int (obj, omp_ipr_fr_id, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (fr == expected_fr);
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ret_code = omp_irc_no_value;
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const char *fr_name = omp_get_interop_str (obj, omp_ipr_fr_name, &ret_code);
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assert (ret_code == omp_irc_success);
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if (fr == omp_ifr_cuda)
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assert (strcmp (fr_name, "cuda") == 0);
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else if (fr == omp_ifr_cuda_driver)
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assert (strcmp (fr_name, "cuda_driver") == 0);
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else if (fr == omp_ifr_hip)
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assert (strcmp (fr_name, "hip") == 0);
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else
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assert (0);
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ret_code = omp_irc_no_value;
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int vendor = (int) omp_get_interop_int (obj, omp_ipr_vendor, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (vendor == 11); /* Nvidia */
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ret_code = omp_irc_no_value;
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const char *vendor_name = omp_get_interop_str (obj, omp_ipr_vendor_name, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (strcmp (vendor_name, "nvidia") == 0);
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ret_code = omp_irc_no_value;
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int dev_num = (int) omp_get_interop_int (obj, omp_ipr_device_num, &ret_code);
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assert (ret_code == omp_irc_success);
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if (dev == DEFAULT_DEVICE)
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assert (dev_num == omp_get_default_device ());
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else
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assert (dev_num == dev);
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/* Platform: N/A. */
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ret_code = omp_irc_success;
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(void) omp_get_interop_int (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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ret_code = omp_irc_success;
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(void) omp_get_interop_ptr (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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ret_code = omp_irc_success;
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(void) omp_get_interop_str (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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/* Device: int / CUdevice / hipDevice_t -- all internally an 'int'. */
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ret_code = omp_irc_no_value;
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int fr_device = (int) omp_get_interop_int (obj, omp_ipr_device, &ret_code);
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/* CUDA also starts from 0 and goes to < n with cudaGetDeviceCount(&cn). */
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assert (ret_code == omp_irc_success);
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assert (fr_device >= 0 && fr_device < omp_get_num_devices ());
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/* Device context: N/A / CUcontext / hipCtx_t -- a pointer. */
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ret_code = omp_irc_out_of_range;
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void *ctx = omp_get_interop_ptr (obj, omp_ipr_device_context, &ret_code);
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if (fr == omp_ifr_cuda)
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{
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assert (ret_code == omp_irc_no_value);
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assert (ctx == NULL);
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}
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else
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{
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assert (ret_code == omp_irc_success);
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assert (ctx != NULL);
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}
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/* Stream/targetsync: cudaStream_t / CUstream / hipStream_t -- a pointer. */
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ret_code = omp_irc_out_of_range;
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void *stream = omp_get_interop_ptr (obj, omp_ipr_targetsync, &ret_code);
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if (is_targetsync) /* no targetsync */
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{
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assert (ret_code == omp_irc_success);
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assert (stream != NULL);
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}
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else
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{
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assert (ret_code == omp_irc_no_value);
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assert (stream == NULL);
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}
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check_type (obj);
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if (fr == omp_ifr_cuda)
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{
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_platform), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device), "int") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device_context), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_targetsync), "cudaStream_t") == 0);
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}
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else if (fr == omp_ifr_cuda_driver)
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{
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_platform), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device), "CUdevice") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device_context), "CUcontext") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_targetsync), "CUstream") == 0);
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}
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else
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{
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_platform), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device), "hipDevice_t") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device_context), "hipCtx_t") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_targetsync), "hipStream_t") == 0);
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}
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}
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void
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check_gcn (omp_interop_t obj, int dev, omp_interop_fr_t expected_fr, _Bool is_targetsync)
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{
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assert (obj != omp_interop_none && obj != (omp_interop_t) -1L);
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omp_interop_rc_t ret_code = omp_irc_no_value;
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omp_interop_fr_t fr = (omp_interop_fr_t) omp_get_interop_int (obj, omp_ipr_fr_id, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (fr == expected_fr);
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ret_code = omp_irc_no_value;
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const char *fr_name = omp_get_interop_str (obj, omp_ipr_fr_name, &ret_code);
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assert (ret_code == omp_irc_success);
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if (fr == omp_ifr_hip)
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assert (strcmp (fr_name, "hip") == 0);
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else if (fr == omp_ifr_hsa)
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assert (strcmp (fr_name, "hsa") == 0);
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else
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assert (0);
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ret_code = omp_irc_no_value;
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int vendor = (int) omp_get_interop_int (obj, omp_ipr_vendor, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (vendor == 1); /* Amd */
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ret_code = omp_irc_no_value;
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const char *vendor_name = omp_get_interop_str (obj, omp_ipr_vendor_name, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (strcmp (vendor_name, "amd") == 0);
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ret_code = omp_irc_no_value;
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int dev_num = (int) omp_get_interop_int (obj, omp_ipr_device_num, &ret_code);
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assert (ret_code == omp_irc_success);
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if (dev == DEFAULT_DEVICE)
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assert (dev_num == omp_get_default_device ());
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else
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assert (dev_num == dev);
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/* Platform: N/A. */
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ret_code = omp_irc_success;
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(void) omp_get_interop_int (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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ret_code = omp_irc_success;
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(void) omp_get_interop_ptr (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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ret_code = omp_irc_success;
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(void) omp_get_interop_str (obj, omp_ipr_platform, &ret_code);
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assert (ret_code == omp_irc_no_value);
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/* Device: hipDevice_t / hsa_agent_t* -- hip is internally an 'int'. */
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ret_code = omp_irc_no_value;
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if (fr == omp_ifr_hip)
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{
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/* HIP also starts from 0 and goes to < n as with cudaGetDeviceCount(&cn). */
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int fr_device = (int) omp_get_interop_int (obj, omp_ipr_device, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (fr_device >= 0 && fr_device < omp_get_num_devices ());
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}
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else
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{
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void *agent = omp_get_interop_ptr (obj, omp_ipr_device, &ret_code);
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assert (ret_code == omp_irc_success);
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assert (agent != NULL);
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}
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/* Device context: hipCtx_t / N/A -- a pointer. */
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ret_code = omp_irc_out_of_range;
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void *ctx = omp_get_interop_ptr (obj, omp_ipr_device_context, &ret_code);
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if (fr == omp_ifr_hip)
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{
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assert (ret_code == omp_irc_success);
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assert (ctx != NULL);
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}
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else
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{
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assert (ret_code == omp_irc_no_value);
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assert (ctx == NULL);
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}
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/* Stream/targetsync: cudaStream_t / CUstream / hipStream_t -- a pointer. */
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ret_code = omp_irc_out_of_range;
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void *stream = omp_get_interop_ptr (obj, omp_ipr_targetsync, &ret_code);
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if (is_targetsync)
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{
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assert (ret_code == omp_irc_success);
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assert (stream != NULL);
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}
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else
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{
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assert (ret_code == omp_irc_no_value);
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assert (stream == NULL);
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}
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check_type (obj);
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if (fr == omp_ifr_hip)
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{
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_platform), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device), "hipDevice_t") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device_context), "hipCtx_t") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_targetsync), "hipStream_t") == 0);
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}
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else
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{
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_platform), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device), "hsa_agent_t *") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_device_context), "N/A") == 0);
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assert (strcmp (omp_get_interop_type_desc (obj, omp_ipr_targetsync), "hsa_queue_t *") == 0);
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}
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}
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