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Like AArch64 and POWER, RISC-V does not support trap on zero divide. gcc/testsuite/ * gnat.dg/div_zero.adb: Skip on RISC-V.
25 lines
553 B
Ada
25 lines
553 B
Ada
-- { dg-do run }
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-- { dg-skip-if "divide does not trap" { aarch64*-*-* powerpc*-*-* riscv*-*-* } }
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-- This test requires architecture- and OS-specific support code for unwinding
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-- through signal frames (typically located in *-unwind.h) to pass. Feel free
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-- to disable it if this code hasn't been implemented yet.
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procedure Div_Zero is
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pragma Suppress (All_Checks);
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function Zero return Integer is
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begin
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return 0;
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end;
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D : Integer := Zero;
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begin
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D := 1 / D;
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raise Program_Error;
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exception
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when Constraint_Error => null;
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end;
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