1164 Commits

Author SHA1 Message Date
Jakub Jelinek
8a99fdb704 Use -latomic_asneeded or -lgcc_s_asneeded to workaround libtool issues [PR123396]
On Mon, Jan 12, 2026 at 12:13:35PM +0100, Florian Weimer wrote:
> One way to work around the libtool problem would be to stick the
> as-needed into an existing .so linker script, or create a new one under
> a different name (say libatomic_optional.so) that has AS_NEEDED in it,
> and link with -latomic_optional.  Then libtool would not have to be
> taught about --push-state/--pop-state etc.

That seems to work.

So far bootstrapped (c,c++,fortran,lto only) and make install tested
on x86_64-linux, tested on a small program without need to libatomic and
struct S { char a[25]; };
_Atomic struct S s;

int main () { struct S t = s; s = t; }
which does at -O0.
Before this patch I got
for i in `find x86_64-pc-linux-gnu/ -name lib\*.so.\*.\*`; do ldd -u $i 2>&1 | grep -q libatomic.so.1 && echo $i; done
x86_64-pc-linux-gnu/libsanitizer/ubsan/.libs/libubsan.so.1.0.0
x86_64-pc-linux-gnu/libsanitizer/asan/.libs/libasan.so.8.0.0
x86_64-pc-linux-gnu/libsanitizer/hwasan/.libs/libhwasan.so.0.0.0
x86_64-pc-linux-gnu/libsanitizer/lsan/.libs/liblsan.so.0.0.0
x86_64-pc-linux-gnu/libsanitizer/tsan/.libs/libtsan.so.2.0.0
x86_64-pc-linux-gnu/32/libsanitizer/ubsan/.libs/libubsan.so.1.0.0
x86_64-pc-linux-gnu/32/libsanitizer/asan/.libs/libasan.so.8.0.0
x86_64-pc-linux-gnu/32/libstdc++-v3/src/.libs/libstdc++.so.6.0.35
x86_64-pc-linux-gnu/libgcobol/.libs/libgcobol.so.2.0.0
x86_64-pc-linux-gnu/libstdc++-v3/src/.libs/libstdc++.so.6.0.35
With this patch it prints nothing.

2026-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR libstdc++/123396
gcc/
	* configure.ac (gcc_cv_ld_use_as_needed_ldscript): New test.
	(USE_LD_AS_NEEDED_LDSCRIPT): New AC_DEFINE.
	* gcc.cc (LINK_LIBATOMIC_SPEC): Use "-latomic_asneeded" instead
	of LD_AS_NEEDED_OPTION " -latomic " LD_NO_AS_NEEDED_OPTION
	if USE_LD_AS_NEEDED_LDSCRIPT is defined.
	(init_gcc_specs): Use "-lgcc_s_asneeded" instead of
	LD_AS_NEEDED_OPTION " -lgcc_s " LD_NO_AS_NEEDED_OPTION
	if USE_LD_AS_NEEDED_LDSCRIPT is defined.
	* config.in: Regenerate.
	* configure: Regenerate.
libatomic/
	* acinclude.m4 (LIBAT_BUILD_ASNEEDED_SOLINK): New AM_CONDITIONAL.
	* libatomic_asneeded.so: New file.
	* libatomic_asneeded.a: New file.
	* Makefile.am (toolexeclib_DATA): Set if LIBAT_BUILD_ASNEEDED_SOLINK.
	(all-local): Install those files into gcc subdir.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
libgcc/
	* config/t-slibgcc (SHLIB_ASNEEDED_SOLINK,
	SHLIB_MAKE_ASNEEDED_SOLINK, SHLIB_INSTALL_ASNEEDED_SOLINK): New
	vars.
	(SHLIB_LINK): Include $(SHLIB_MAKE_ASNEEDED_SOLINK).
	(SHLIB_INSTALL): Include $(SHLIB_INSTALL_ASNEEDED_SOLINK).
2026-01-13 10:06:47 +01:00
Kito Cheng
808b684172 RISC-V: Add support for _BitInt [PR117581]
This patch implements _BitInt support for RISC-V target by defining the
type layout and ABI requirements.  The limb mode selection is based on
the bit width, using appropriate integer modes from QImode to TImode.
The implementation also adds the necessary libgcc version symbols for
_BitInt runtime support functions.

Changes in v3:
- Require sync_char_short effective target for bitint-64.c, bitint-82.c
  and bitint-84.c tests since they use atomic operations.
- Add -fno-section-anchors to bitint-32-on-rv64.c and adjust expected
  assembly output patterns.

Changes in v2:
- limb_mode use up to XLEN when N > XLEN, which is different setting from
  the abi_limb_mode.
- Adding missing floatbitinthf in libgcc.

gcc/ChangeLog:

	PR target/117581
	* config/riscv/riscv.cc (riscv_bitint_type_info): New function.
	(TARGET_C_BITINT_TYPE_INFO): Define.

gcc/testsuite/ChangeLog:

	PR target/117581
	* gcc.dg/torture/bitint-64.c: Add sync_char_short effective target
	requirement.
	* gcc.dg/torture/bitint-82.c: Likewise.
	* gcc.dg/torture/bitint-84.c: Likewise.
	* gcc.target/riscv/bitint-32-on-rv64.c: New test.
	* gcc.target/riscv/bitint-alignments.c: New test.
	* gcc.target/riscv/bitint-args.c: New test.
	* gcc.target/riscv/bitint-sizes.c: New test.

libgcc/ChangeLog:

	PR target/117581
	* config/riscv/libgcc-riscv.ver: New file.
	* config/riscv/t-elf (SHLIB_MAPFILES): Add libgcc-riscv.ver.
	* config/riscv/t-softfp32 (softfp_extras): Add floatbitinttf and
	fixtfbitint.
2026-01-13 11:23:40 +08:00
Jerome Guitton
2b9bbe4301 remove inclusion of tickLib.h from gthr-vxworks.h
This header is not used any more and its inclusion is problematic
when building against Helix Cert as it might end up dragging LLVM-specific
headers from spinLockLib.h.

libgcc/
	* config/gthr-vxworks.h: Remove #include of tickLib.h.
2026-01-11 11:41:38 +00:00
Stefan Schulze Frielinghaus
5d6d56d837 s390: Add HF mode support
This patch adds support for _Float16.  As time of writing this, there is
no hardware _Float16 support on s390.  Therefore, _Float16 operations
have to be extended and truncated which is supported via soft-fp.

The ABI demands that _Float16 values are left aligned in FP registers
similar as it is already the case for 32-bit FP values.  If vector
extensions are available, copying between left-aligned FPRs and
right-aligned GPRs is natively supported.  Without vector extensions,
the alignment has to be taken care of manually.  For target z10,
instructions lgdr/ldgr can be used in conjunction with shifts.  Copying
via lgdr from an FPR into a GPR is the easy case since for the shift the
target GPR can be utilized.  However, copying via ldgr from a GPR into a
FPR requires a secondary reload register which is used for the shift
result and is then copied into the FPR.  Prior z10, there is no hardware
support in order to copy directly between FPRs and GPRs.  Therefore, in
order to copy from a GPR into an FPR we would require a secondary reload
register for the shift and secondary memory for copying the aligned
value.  Since this is not supported, _Float16 support starts with z10.
As a consequence, for all targets older than z10 test
libstdc++-abi/abi_check fails.

gcc/ChangeLog:

	* config/s390/s390-modes.def (FLOAT_MODE): Add HF mode.
	(VECTOR_MODE): Add V{1,2,4,8,16}HF modes.
	* config/s390/s390.cc (s390_scalar_mode_supported_p): For 64-bit
	targets z10 and newer support HF mode.
	(s390_vector_mode_supported_p): Add HF mode.
	(s390_register_move_cost): Keep HF mode operands in registers.
	(s390_legitimate_constant_p): Support zero constant.
	(s390_secondary_reload): For GPR to FPR moves a secondary reload
	register is required.
	(s390_secondary_memory_needed): GPR<->FPR moves don't require
	secondary memory.
	(s390_libgcc_floating_mode_supported_p): For 64-bit targets z10
	and newer support HF mode.
	(s390_hard_regno_mode_ok): Allow HF mode for FPRs and VRs.
	(s390_function_arg_float): Consider HF mode, too.
	(s390_excess_precision): For EXCESS_PRECISION_TYPE_FLOAT16
	return FLT_EVAL_METHOD_PROMOTE_TO_FLOAT16.
	(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
	* config/s390/s390.md (movhf): Define.
	(reload_half_gprtofpr_z10): Define.
	(signbithf2): Define.
	* config/s390/vector.md: Add new vector modes to various
	iterators.

libgcc/ChangeLog:

	* config.host: Include s390/t-float16.
	* config/s390/libgcc-glibc.ver: Export symbols
	__trunc{sf,df,tf}hf2, __extendhf{sf,df,tf}2, __fix{,uns}hfti,
	__float{,un}tihf, __floatbitinthf.
	* config/s390/t-softfp: Add to softfp_extras instead of setting
	it.
	* configure: Regenerate.
	* configure.ac: Support float16 only for 64-bit targets z10 and
	newer.
	* config/s390/_dpd_dd_to_hf.c: New file.
	* config/s390/_dpd_hf_to_dd.c: New file.
	* config/s390/_dpd_hf_to_sd.c: New file.
	* config/s390/_dpd_hf_to_td.c: New file.
	* config/s390/_dpd_sd_to_hf.c: New file.
	* config/s390/_dpd_td_to_hf.c: New file.
	* config/s390/t-float16: New file.

libstdc++-v3/ChangeLog:

	* config/abi/post/s390x-linux-gnu/baseline_symbols.txt: Add
	names {,P,K}DF16.

gcc/testsuite/ChangeLog:

	* g++.target/s390/float16-1.C: New test.
	* g++.target/s390/float16-2.C: New test.
	* gcc.target/s390/float16-1-2.h: New test.
	* gcc.target/s390/float16-1.c: New test.
	* gcc.target/s390/float16-10.c: New test.
	* gcc.target/s390/float16-2.c: New test.
	* gcc.target/s390/float16-3.c: New test.
	* gcc.target/s390/float16-4.c: New test.
	* gcc.target/s390/float16-5.c: New test.
	* gcc.target/s390/float16-6.c: New test.
	* gcc.target/s390/float16-7.c: New test.
	* gcc.target/s390/float16-8.c: New test.
	* gcc.target/s390/float16-9.c: New test.
	* gcc.target/s390/float16-signbit.h: New test.
	* gcc.target/s390/vector/vec-extract-4.c: New test.
	* gcc.target/s390/vector/vec-float16-1.c: New test.
2026-01-10 17:22:46 +01:00
Xinhui Yang
bb9cb9c7c0 [PATCH] ia64: properly include libunwind support during configuration
By using the test `with_system_libunwind', libgcc can use either
in-house implementation or reference external libunwind symbols.
However, this breaks the static libgcc.a library, as in t-linux it
references unwind-compat.c, which turns some _Unwind_* symbols into
references of the corresponding symbols in libunwind, but libunwind does
not exist in some conditions (e.g. bootstrapping a toolchain). The
linker complains about `missing version node for symbol', since it can
not find the symbol it is referring to.

The unwind-compat.c module should only exist, if system libunwind is
being used. Also GCC itself should add -lunwind only if this condition
is met, too.

Implementing better control for whether to embed unwind implementation
into libgcc to fix this issue.

gcc/
	* config.gcc: limit -lunwind usage by testing if the system
	libunwind is being used.

libgcc/
	* config.host (ia64): include unwind-compat only if the system
	libunwind is being used.

	* config/ia64/t-linux-libunwind: include libgcc symver definition
	for libgcc symbols, since it bears the same role as t-linux
	(except libunwind); Include fde-glibc.c since the unwind
	implementation requires _Unwind_FindTableEntry in this file.

	* config/ia64/unwind-ia64.c: protect _Unwind_FindTableEntry inside
	inihbit_libc ifndefs to allow it to build with newlib or
	without proper headers.
2026-01-07 08:59:34 -07:00
Vladimir Vishniakov
7d702dc92a [committed] Use compact form to update stack pointer in libgcc
libgcc/
	* config/v850/lib1funcs.S (__return_r26_r31): Use compact
	add form to adjust stack pointer.
	(__save_r27_r31): Likewise.
	(__save_r29_r31): Likewise.
	(__save_r31): Likewise.
	(__return_r27_r31): Likewise.
	(__return_r28_r31): Likewise.
	(__return_r29_r31): Likewise.
	(__return_r31): Likewise.
	(__return_r2_r31): Likewise.
2026-01-07 08:51:24 -07:00
Vladimir Vishniakov
1bfe9149f6 [committed] [PR target/123403] Fix base register and offsets for v850 libgcc
PR target/123403
libgcc/
	* config/v850/lib1funcs.S (__return_r25_r29): Fix ! __EP__ clause to
	use SP, not EP.
	(__return_r2_r31): Fix offsets to match store offsets.
2026-01-07 08:37:30 -07:00
Jakub Jelinek
254a858ae7 Update copyright years. 2026-01-02 09:56:11 +01:00
Jakub Jelinek
c715060dd6 Update Copyright year in ChangeLog files
2025 -> 2026
2026-01-01 18:58:28 +01:00
Peter Damianov
34762fba4c [PATCH] Remove score files in libgcc
This target was deleted in r5-3909-g3daa7bbf791203,
but a few files in libgcc were missed. Delete them.

libgcc/ChangeLog:

	* config/score/crti.S: Delete.
	* config/score/crtn.S: Delete.
	* config/score/sfp-machine.h: Delete.

Signed-off-by: Peter Damianov <peter0x44@disroot.org>
2025-12-14 20:08:06 -07:00
mengqinggang
a79d9b6dbf LoongArch: Add support for libgcc on LA32
LA32 does not support extreme code mode, change to medium code model on LA32.

libgcc/ChangeLog:

	* configure: Regenerate.
	* configure.ac:
	* config/loongarch/t-crtstuff-la32: New file.
	* config/loongarch/t-crtstuff: Rename to t-crtstuff-la64.

Reviewed-by: Xi Ruoyao <xry111@xry111.site>
Reviewed-by: Lulu Cheng <chenglulu@loongson.cn>
2025-12-12 15:56:47 +08:00
John Ericson
9947930b7a libgcc: Dont use TARGET_SYSTEM_ROOT from gcc
Following Andrew Pinski's suggestions in
https://gcc.gnu.org/pipermail/gcc-patches/2025-July/689683.html, just
use the output of:

   $(CC) -print-sysroot

It is just used in one spot, in an AIX code-path. I just made (within
make) a shell variable to use instead.

I don't have AIX on-hand to test this, however.

gcc/ChangeLog:

	* Makefile.in: No longer include TARGET_SYSTEM_ROOT in
	libgcc.mvars.

libgcc/ChangeLog:

	* config/rs6000/t-slibgcc-aix: Instead of using a
	TARGET_SYSTEM_ROOT make variable, just define a shell variable
	as part of the rule and use that.

Suggested-by: Andrew Pinski <quic_apinski@quicinc.com>
Signed-off-by: John Ericson <git@JohnEricson.me>
2025-12-09 22:06:52 +00:00
Lulu Cheng
c3858c51a4 LoongArch: fmv: Fix compilation errors when using glibc versions earlier than 2.38.
The macros HWCAP_LOONGARCH_LSX and HWCAP_LOONGARCH_LASX were defined
in glibc 2.38.  However, r16-5155 uses these two macros directly
without checking whether they are defined.  This causes errors when
compiling libgcc with glibc versions earlier than 2.38.

gcc/ChangeLog:

	* doc/extend.texi: Remove the incorrect prompt message.

libgcc/ChangeLog:

	* config/loongarch/cpuinfo.c (HWCAP_LOONGARCH_LSX): Define
	it if it is not defined.
	(HWCAP_LOONGARCH_LASX): Likewise.
2025-11-27 09:49:52 +08:00
LIU Hao
d9b785ab92 libgcc: Pass x87 control word in the correct type
The x87 control word should be passed as an `unsigned short`. Previous
code passed `unsigned int`, and when building with `-masm=intel`,

   __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_cw));

could expand to `fnstcw DWORD PTR [esp+48]` and cause errors like

   {standard input}: Assembler messages:
   {standard input}:7137: Error: operand size mismatch for `fnstcw'

libgcc/ChangeLog:

	PR target/122275
	* config/i386/32/dfp-machine.h (DFP_GET_ROUNDMODE): Change `_frnd_orig` to
	`unsigned short` for x87 control word.
	(DFP_SET_ROUNDMODE): Manipulate the x87 control word as `unsigned short`,
	and manipulate the MXCSR as `unsigned int`.

Signed-off-by: LIU Hao <lh_mouse@126.com>
2025-11-21 14:08:48 +01:00
Lulu Cheng
4fa46c8adf LoongArch: Implement __init_loongarch_features_resolver.
This patch can obtain the CPUCFG and HWCAP value at runtime and
extract the flag bits of features for function selection.
HWCAP is used to obtain the support of LSX and LASX because the
kernel can control the enable/disable of these two features.

Note that this requires glibc version 2.38 or higher to compile
and run.

libgcc/ChangeLog:

	* config/loongarch/t-loongarch64: Add cpuinfo.c to LIB2ADD.
	* config/loongarch/cpuinfo.c: New file.
2025-11-11 15:33:37 +08:00
Olivier Hainque
bc8abe881e Replace VSB_DIR by sysroot refs in VxWorks LIBGCC2_INCLUDES
This matches what VXWORKS_ADDITIONAL_CPP_SPEC does, allowing libgcc to
build without VSB_DIR defined in the environment as soon as the configure
switches featured a proper --with-build-sysroot was provided.

Tested with a successful build for --target=powerpc-wrs-vxworks7r2
using mainline sources.

2025-10-23  Olivier Hainque  <hainque@adacore.com>

libgcc/
	* config/t-vxworks (LIBGCC2_INCLUDES): Replace $(VSB_DIR)
	by sysroot references.
2025-10-25 13:55:04 +00:00
Ashley Gay
ce46ebb26b Ensure use of gcc's version of stdatomic.h in gthr-vxworks
VxWorks provides its own version of the standard stdatomic.h, possibly
relying on non-gcc builtins, and our implementation of the gthr API resorts
to VxWorks specific functions for atomicity features.

When compiling libgcc (with gcc), make sure gcc's version of stdatomic.h
is used: #include it here, first, then define the macro used to guard the
system version so it doesn't get expanded when included indirectly by
other system headers.

2025-10-20  Olivier Hainque  <hainque@adacore.com>
	    Ashley Gay  <gay@adacore.com>

libgcc/
	* config/gthr-vxworks.h: Include stdatomic.h and prevent indirect
	inclusion of contents from the system version of that header.
2025-10-20 17:09:54 +00:00
Olivier Hainque
4514439dac Tidy bits of libgcc/config/gthr-vxworks
This addresses a variety of warnings about missing prototypes
or suspicious ptr-to-function conversions.

libgcc/
	* config/gthr-vxworks-thread.c (__init_gthread_tcb): Make static.
	(__delete_gthread_tcb): Likewise.
	(__task_wrapper): Likewise.
	(__gthread_create): Convert __task_wrapper to (void *) before going
	to (FUNCPTR).
	* config/gthr-vxworks-tls.c (tls_delete_hook): Accommodate prototype
	variations between kernel and rtp. Return STATUS.
2025-10-20 16:56:08 +00:00
Olivier Hainque
c3a37c4d5f Infer TOOL/TOOL_FAMILY from vxworks-predef.h on VxWorks7
This change moves, for VxWorks 7, the setting of the TOOL
and TOOL_FAMILY macros from a builtin_define to a run-time
computation from vxworks-predefs.h.

This is useful on Vx7 to allow a single toolchain to be used
for instances of VxWorks based on either a gnu or an llvm system
toolchain for a given cpu (typically, powerpc).

This is achieved by leveraging the existence of a very basic
autoconf.h file in all VxWorks 7 VSBs, #included directly from
vxworks-predef.h.

gcc/
	* config/vxworks.h (VXWORKS_OS_CPP_BUILTINS): Only
	builtin_define TOOL and TOOL_FAMILY for !TARGET_VXWORKS7.
	Augment comment on VXWORKS_PERSONALITY.
	* config/vxworks/vxworks-predef.h: Infer TOOL and TOOL_FAMILY
	from the VSB autoconf.h	when we have one, determined by the presence
	of a _VSB_CONFIG_FILE definition.

libgcc/
	* config/t-vxworks: -include vxworks-predef.h explicitly, as the
	automatic inclusion is disabled by -nostdinc.
2025-10-20 15:15:38 +00:00
GCC Administrator
ea7fa6bf48 Daily bump. 2025-10-10 00:21:51 +00:00
Georg-Johann Lay
078208cf15 AVR: target/122222 - Add modules for __floatsidf, __floatunsidf.
PR target/122222
libgcc/config/avr/libf7/
	* libf7-asm.sx (D_floatsidf, D_floatunsidf): New modules.
	* libf7-common.mk (F7_ASM_PARTS): Add D_floatsidf, D_floatunsidf.
	(F7F, g_dx): Remove floatunsidf, floatsidf.
	* libf7.c (f7_set_s32): Don't alias to f7_floatsidf.
	(f7_set_u32): Don't alias to f7_floatunsidf.
	* f7-renames.h: Rebuild
	* f7-wraps.h: Rebuild.

gcc/testsuite/
	* gcc.target/avr/pr122222-sitod.c: New test.
2025-10-09 21:55:11 +02:00
Georg-Johann Lay
3ea09e4d43 AVR: target/122220 - Let (int32_t) -0x1p31L return INT32_MIN.
PR target/122220
libgcc/config/avr/libf7/
	* libf7-asm.sx (to_integer): Return 0x80... on negative overflow.

gcc/testsuite/
	* gcc.target/avr/pr122220.c: New test.
2025-10-09 21:55:10 +02:00
Georg-Johann Lay
b0bc615d93 AVR: target/122210 - Add double -> fixed-point conversions.
PR target/122210
libgcc/config/avr/libf7/
	* libf7-common.mk (F7_ASM_PARTS): Add D2<fx> modules.
	* libf7-asm.sx: Implement the D2<fx> modules.

gcc/testsuite/
	* gcc.target/avr/dtofx.c: New test.
2025-10-09 10:43:57 +02:00
Georg-Johann Lay
7304e83f1f AVR: target/122210 - Add fixed-point -> double conversions.
PR target/122210
libgcc/config/avr/libf7/
	* libf7-common.mk (F7_ASM_PARTS): Add <fx>2D modules.
	* libf7-asm.sx: Implement the <fx>2D modules.

gcc/testsuite/
	* gcc.target/avr/fxtod.c: New test.
2025-10-09 10:43:56 +02:00
GCC Administrator
491cae7d30 Daily bump. 2025-10-08 00:20:55 +00:00
H.J. Lu
3dcf3410a7 libbid: Set rounding mode to round-to-nearest for _Decimal128 arithmetic
Since _Decimal128 arithmetic requires the round-to-nearest rounding
mode, define DFP_INIT_ROUNDMODE and DFP_RESTORE_ROUNDMODE, similar to
FP_INIT_ROUNDMODE in sfp-machine.h, to set the rounding mode to
round-to-nearest at _Decimal128 related arithmetic function entrances
and restores it upon return.  This doesn't require linking with libm
when libgcc is used.

libgcc/

	PR target/120691
	* Makefile.in (DECNUMINC): Add -I$(srcdir)/config/$(cpu_type).
	* config/i386/dfp-machine.h: New file.
	* config/i386/32/dfp-machine.h: Likewise.
	* config/i386/64/dfp-machine.h: Likewise.

libgcc/config/libbid/

	PR target/120691
	* bid128_div.c: Run DFP_INIT_ROUNDMODE at function entrace and
	DFP_RESTORE_ROUNDMODE at function exit.
	* bid128_rem.c: Likewise.
	* bid128_sqrt.c: Likewise.
	* bid64_div.c (bid64_div): Likewise.
	* bid64_sqrt.c (bid64_sqrt): Likewise.
	* bid_conf.h: Include <dfp-machine.h>.
	* dfp-machine.h: New file.

gcc/testsuite/

	PR target/120691
	* gcc.target/i386/pr120691.c: New test.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-10-08 06:08:52 +08:00
GCC Administrator
f7b0636b5f Daily bump. 2025-10-07 00:21:28 +00:00
Georg-Johann Lay
e3a05e0502 AVR/LibF7: Implement sincos.
libgcc/config/avr/libf7/
	* libf7-common.mk (F7_ASM_PARTS): Add D_sincos.
	* libf7-asm.sx: (D_sincos): New module implements sincos / sincosl.

gcc/testsuite/
	* gcc.target/avr/sincos-1.c: New test.
2025-10-06 21:37:59 +02:00
Georg-Johann Lay
efb3cd64fd AVR/LibF7: target/122177 - fix fmin / fmax return value for one NaN arg.
fmin and fmax should return the non-NaN argument in the case where
exactly one argument is a NaN.

Moreover, IEEE double fmin and fmax can be performed without
first converting the args to the internal representation and
then converting back again.

	PR target/122177
libgcc/config/avr/libf7/
	* libf7-common.mk (m_ddd): Remove: fmin, fmax.
	(F7_ASM_PARTS): Add: D_fminfmax.
	* libf7-asm.sx (D_fmanfmax): New module.
	* f7-wraps.h: Rebuild.

gcc/testsuite/
	* gcc.target/avr/fminfmax-1.c: New test.
2025-10-06 17:19:59 +02:00
Georg-Johann Lay
e5731a4bc5 AVR: Speed up IEEE double comparisons.
IEEE double can be compared without first converting them to
the internal representation.

libgcc/config/avr/libf7/
	* libf7-common.mk (g_xdd_cmp): Remove le, lt, ge, gt, ne, eq, unord.
	(F7_ASM_PARTS): Add D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord.
	* libf7-asm.sx (D_cmp, D_eq, D_ne, D_ge, D_gt, D_le, D_lt, D_unord):
	New modules.
	* f7-wraps.h: Rebuild.

gcc/testsuite/
	* gcc.target/avr/cmpdi-1.c: New test.
2025-10-06 17:19:50 +02:00
Andre Vieira
796d70db70 libgcc, bitint: do not use softfp_wrap for bitint and add build option
This patch circumvents the softfp_wrap for bitint functions in libgcc as certain
ports, like arm, can use softfp_wrap to distinquigh between targets they want to
use specialized assembly functions for and targets that they use the soft-fp
C implementations for.  This is an orthogonal choice to the use of the soft-fp
C implementations for bitint conversions.

This patch also adds extra options to build bitint soft-fp functions, this is
needed by the arm port to build HF bitint conversion functions.

libgcc/ChangeLog:

	* config/t-softfp: Don't use softfp_wrap for bitint functions.
	(softfp_cflags): New parameter that is passed to the building of bitint
	functions.
2025-09-30 10:57:58 +01:00
John David Anglin
80d729c4b1 hppa: Fix asm in atomic_store_8 in sync-libfuncs.c
Fix typo in the asm in atomic_store_8.  Also correct floating
point store.

Reported by Nick Hudson for netbsd.

2025-09-25  John David Anglin  <danglin@gcc.gnu.org>

libgcc/ChangeLog:

	* config/pa/sync-libfuncs.c (atomic_store_8): Fix asm.
2025-09-25 10:49:39 -04:00
Jim Lin
afdf44154f RISC-V: Only Save/Restore required registers for ILP32E/LP64E
Previously the spec
https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/70
has changed the save/restore routines to save/restore the registers which
are really used for ILP32E/LP64 rather than always save/restore all
of ra/s0/s1.

I also found here that lacks the implementation for lp64e. If it's
necessary I will file anothor patch for that.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_compute_frame_info): Remove the
	dedicated calculation for RVE.

libgcc/ChangeLog:

	* config/riscv/save-restore.S: Only save/restore the registers
	which are really used for ILP32E/LP64.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/save-restore-cfi-3.c: New test.
2025-09-19 07:09:21 -06:00
GCC Administrator
f485138167 Daily bump. 2025-08-31 00:18:58 +00:00
liuhongt
668e607efe Revert "Fix _Decimal128 arithmetic error under FE_UPWARD."
This reverts commit 50064b2898.
2025-08-29 19:22:40 -07:00
GCC Administrator
fdb499c2f6 Daily bump. 2025-08-30 00:19:51 +00:00
liuhongt
50064b2898 Fix _Decimal128 arithmetic error under FE_UPWARD.
libgcc/config/libbid/ChangeLog:

	PR target/120691
	* bid128_div.c: Fix _Decimal128 arithmetic error under
	FE_UPWARD.
	* bid128_rem.c: Ditto.
	* bid128_sqrt.c: Ditto.
	* bid64_div.c (bid64_div): Ditto.
	* bid64_sqrt.c (bid64_sqrt): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/pr120691.c: New test.
2025-08-28 19:02:21 -07:00
Dimitar Dimitrov
625af54662 pru: libgcc: Add software implementation for multiplication
For cores without a hardware multiplier, set respective optabs
with library functions which use software implementation of
multiplication.

The implementation was copied from the RL78 backend.

gcc/ChangeLog:

	* config/pru/pru.cc (pru_init_libfuncs): Set softmpy libgcc
	functions for optab multiplication entries if TARGET_OPT_MUL
	option is not set.

libgcc/ChangeLog:

	* config/pru/libgcc-eabi.ver: Add __pruabi_softmpyi and
	__pruabi_softmpyll symbols.
	* config/pru/t-pru: Add softmpy source files.
	* config/pru/pru-softmpy.h: New file.
	* config/pru/softmpyi.c: New file.
	* config/pru/softmpyll.c: New file.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2025-08-21 21:43:05 +03:00
Yang Yujie
8079e96eb7 LoongArch: Add support for _BitInt [PR117599]
This patch adds support for C23's _BitInt for LoongArch.

From the LoongArch psABI[1]:

> _BitInt(N) objects are stored in little-endian order in memory
> and are signed by default.
>
> For N ≤ 64, a _BitInt(N) object have the same size and alignment
> of the smallest fundamental integral type that can contain it.
> The unused high-order bits within this containing type are filled
> with sign or zero extension of the N-bit value, depending on whether
> the _BitInt(N) object is signed or unsigned. The _BitInt(N) object
> propagates its signedness to the containing type and is laid out
> in a register or memory as an object of this type.
>
> For N > 64, _BitInt(N) objects are implemented as structs of 64-bit
> integer chunks. The number of chunks is the smallest even integer M
> so that M * 64 ≥ N. These objects are of the same size of the struct
> containing the chunks, but always have 16-byte alignment. If there
> are unused bits in the highest-ordered chunk that contains used
> bits, they are defined as the sign- or zero- extension of the used
> bits depending on whether the _BitInt(N) object is signed or
> unsigned. If an entire chunk is unused, its bits are undefined.

[1] https://github.com/loongson/la-abi-specs

	PR target/117599

gcc/ChangeLog:

	* config/loongarch/loongarch.h: Define a PROMOTE_MODE case for
	small _BitInts.
	* config/loongarch/loongarch.cc (loongarch_promote_function_mode):
	Same.
	(loongarch_bitint_type_info): New function.
	(TARGET_C_BITINT_TYPE_INFO): Declare.

libgcc/ChangeLog:

	* config/loongarch/t-softfp-tf: Enable _BitInt helper functions.
	* config/loongarch/t-loongarch: Same.
	* config/loongarch/libgcc-loongarch.ver: New file.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/bitint-alignments.c: New test.
	* gcc.target/loongarch/bitint-args.c: New test.
	* gcc.target/loongarch/bitint-sizes.c: New test.
2025-08-13 11:01:55 +08:00
Christophe Lyon
fdc560aaae aarch64: libgcc: Honor disable-werror [PR117600]
In commit r15-4417-g71c7b446b98aa5, I made -werror mandatory when
building libgcc for aarch64.

While it achieved its goal (make us fix problems unnoticed so far),
there has a been a lot of debate because it couldn't be disabled
easily.

This patch adds support for --enable-werror/--disable-werror in
libgcc, defaulting to --enable-werror for aarch64.

Tested on non-bootstrap builds on aarch64-linux-gnu (with
-Wno-prio-ctor-dtor removed in order to get an error).

libgcc/ChangeLog:

	PR libgcc/117600
	* Makefile.in (WERROR): New.
	* config/aarch64/t-aarch64: Handle WERROR.
	* configure: Regenerate.
	* configure.ac: Add support for --enable-werror.
2025-08-08 14:46:57 +00:00
Stefan Schulze Frielinghaus
48787c734e s390: Add _BitInt support
gcc/ChangeLog:

	* config/s390/s390.cc (print_operand): Allow arbitrary wide_int
	constants for _BitInt.
	(s390_bitint_type_info): Implement target hook
	TARGET_C_BITINT_TYPE_INFO.

libgcc/ChangeLog:

	* config/s390/libgcc-glibc.ver: Export _BitInt support
	functions.
	* config/s390/t-softfp (softfp_extras): Add fixtfbitint
	floatbitinttf.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/bitint-1.c: New test.
	* gcc.target/s390/bitint-2.c: New test.
	* gcc.target/s390/bitint-3.c: New test.
	* gcc.target/s390/bitint-4.c: New test.
2025-08-07 08:39:11 +02:00
Stefan Schulze Frielinghaus
872b002b9f s390: libgcc: Enable soft-fp
Enable soft-fp for -m64 only.

libgcc/ChangeLog:

	* config.host: Include makefiles t-softfp for -m64.
	* config/s390/sfp-exceptions.c: New file.
	* config/s390/sfp-machine.h: New file.
	* config/s390/t-softfp: New file.
2025-08-07 08:39:11 +02:00
Wilco Dijkstra
9996036205 libgcc: Update FMV features to latest ACLE spec 2024Q4
Update FMV features to latest ACLE spec of 2024Q4 - several features have been
removed or merged.  Add FMV support for CSSC and MOPS.  Preserve the ordering
in enum CPUFeatures.

gcc:
	* common/config/aarch64/cpuinfo.h: Remove unused features, add FEAT_CSSC
	and FEAT_MOPS.
	* config/aarch64/aarch64-option-extensions.def: Remove FMV support
	for RPRES, use PULL rather than AES, add FMV support for CSSC and MOPS.

libgcc:
	* config/aarch64/cpuinfo.c (__init_cpu_features_constructor):
	Remove unused features, add support for CSSC and MOPS.
2025-07-31 14:23:46 +00:00
Wilco Dijkstra
a6bb6934a4 libgcc: Cleanup HWCAP defines in cpuinfo.c
Cleanup HWCAP defines - rather than including hwcap.h and then repeating it
using ifndef, just define the HWCAPs we need exactly as in hwcap.h.

libgcc:
	* config/aarch64/cpuinfo.c: Cleanup HWCAP defines.
2025-07-31 14:23:46 +00:00
Yury Khrustalev
a8461846ad aarch64: Stop using sys/ifunc.h header in libatomic and libgcc
This optional header is used to bring in the definition of the
struct __ifunc_arg_t type. Since it has been added to glibc only
recently, the previous implementation had to check whether this
header is present and, if not, it provide its own definition.

This creates dead code because either one of these two parts would
not be tested. The ABI specification for ifunc resolvers allows to
create own ABI-compatible definition for this type, which is the
right way of doing it.

In addition to improving consistency, the new approach also helps
with addition of new fields to struct __ifunc_arg_t type without
the need to work-around situations when the definition imported
from the header lacks these new fields.

ABI allows to define as many hwcap fields in this struct as needed,
provided that at runtime we only access the fields that are permitted
by the _size value.

gcc/
	* config/aarch64/aarch64.cc (build_ifunc_arg_type):
	Add new fields _hwcap3 and _hwcap4.

libatomic/
	* config/linux/aarch64/host-config.h (__ifunc_arg_t):
	Remove sys/ifunc.h and add new fields _hwcap3 and _hwcap4.

libgcc/
	* config/aarch64/cpuinfo.c (__ifunc_arg_t): Likewise.
	(__init_cpu_features): obtain and assign values for the
	fields _hwcap3 and _hwcap4.
	(__init_cpu_features_constructor): check _size in the
	arg argument.
2025-07-31 12:39:10 +01:00
Richard Sandiford
b5ffc8e75a aarch64: Adapt unwinder to linux's SME signal behaviour
SME uses a lazy save system to manage ZA.  The idea is that,
if a function with ZA state wants to call a "normal" function,
it can leave its state in ZA and instead set up a lazy save buffer.
If, unexpectedly, that normal function contains a nested use of ZA,
that nested use of ZA must commit the lazy save first.

This lazy save system uses a special system register called TPIDR2_EL0.
See:

  https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#66the-za-lazy-saving-scheme

for details.

The ABI specifies that, on entry to an exception handler, the following
things must be true:

* PSTATE.SM must be 0 (the processor must be in non-streaming mode)

* PSTATE.ZA must be 0 (ZA must be off)

* TPIDR2_EL0 must be 0 (there must be no uncommitted lazy save)

This is normally done by making _Unwind_RaiseException & friends
commit any lazy save before they unwind.  This also has the side
effect of ensuring that TPIDR2_EL0 is never left pointing to a
lazy save buffer that has been unwound.

However, things get more complicated with signals.  If:

(a) a signal is raised while ZA is dormant (that is, while there is an
    uncommitted lazy save);

(b) the signal handler throws an exception; and

(c) that exception is caught outside the signal handler

something must ensure that the lazy save from (a) is committed.

This would be simple if the signal handler was entered with ZA and
TPIDR2_EL0 intact.  However, for various good reasons that are out
of scope here, this is not done.  Instead, Linux now clears both
TPIDR2_EL0 and PSTATE.ZA before entering a signal handler, see:

  https://lore.kernel.org/all/20250417190113.3778111-1-mark.rutland@arm.com/

for details.

Therefore, it is the unwinder that must simulate a commit of the lazy
save from (a).  It can do this by reading the previous values of
TPIDR2_EL0 and ZA from the sigcontext.

The SME-related sigcontext structures were only added to linux's
asm/sigcontext.h relatively recently and we can't rely on GCC being
built against such recent kernel header files.  The patch therefore uses
defines relevant macros if they are not defined and provide types that
comply with ABI layout of the corresponding linux types.

The patch includes some ugly casting in an attempt to support big-endian
ILP32, even though SME on big-endian ILP32 linux should never be a thing.
We can remove it if we also remove ILP32 support from GCC.

Co-authored-by: Yury Khrustalev <yury.khrustalev@arm.com>
Reviewed-by: Tamar Christina <tamar.christina@arm.com>

gcc/
	* doc/sourcebuild.texi (aarch64_sme_hw): Document.

gcc/testsuite/
	* lib/target-supports.exp (add_options_for_aarch64_sme)
	(check_effective_target_aarch64_sme_hw): New procedures.
	* g++.target/aarch64/sme/sme_throw_1.C: New test.
	* g++.target/aarch64/sme/sme_throw_2.C: Likewise.

libgcc/
	* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state):
	If a signal was raised while there was an uncommitted lazy save,
	commit the save as part of the unwind process.
2025-07-17 12:35:43 +01:00
GCC Administrator
7b716c7afe Daily bump. 2025-07-16 00:18:49 +00:00
Andrew Pinski
f307ab8b18 libgcc: Fix aarch64 build
For aarch64, libgcc is built with -Werror, after the latest
-Wunused-but-set* commit (r16-2258-g0eac9cfee8cb0b21d), a new warning
showed up:
```
../../../gcc/libgcc/config/libbid/bid_binarydecimal.c: In function
‘__binary32_to_bid128’:
../../../gcc/libgcc/config/libbid/bid_binarydecimal.c:130:31: error:
variable ‘c3’ set but not used [-Werror=unused-but-set-variable=]
  130 | { unsigned long long c0,c1,c2,c3;                               \
      |                               ^~
../../../gcc/libgcc/config/libbid/bid_binarydecimal.c:146842:5: note:
in expansion of macro ‘__mul_10x256_to_256’
146842 |     __mul_10x256_to_256 (z.w[5], z.w[4], z.w[3], z.w[2],
z.w[5], z.w[4],
       |     ^~~~~~~~~~~~~~~~~~~
```

This fixes it by casting c3 to void after the last __mul_10x64 in
__mul_10x256_to_256 macro to mark it as being "used".

libgcc/config/libbid/ChangeLog:

	* bid_binarydecimal.c (__mul_10x256_to_256): Mark c3 as being
	used.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2025-07-15 09:08:20 -07:00
GCC Administrator
905a156bec Daily bump. 2025-05-28 00:18:43 +00:00
Jakub Jelinek
a57ea0a189 libgcc: Add DPD support + fix big-endian support of _BitInt <-> dfp conversions
The following patch fixes
FAIL: gcc.dg/dfp/bitint-1.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-2.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-3.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-4.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-5.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-6.c (test for excess errors)
FAIL: gcc.dg/dfp/bitint-8.c (test for excess errors)
FAIL: gcc.dg/dfp/int128-1.c (test for excess errors)
FAIL: gcc.dg/dfp/int128-2.c (test for excess errors)
FAIL: gcc.dg/dfp/int128-4.c (test for excess errors)
on s390x-linux (with the 3 not yet posted patches).

The patch does multiple things:
1) the routines were written for the DFP BID (binary integer decimal)
   format which is used on all arches but powerpc*/s390* (those use
   DPD - densely packed decimal format); as most of the code is actually
   the same for both BID and DPD formats, I haven't copied the sources
   + slightly modified them, but added the DPD support directly, + renaming
   of the exported symbols from __bid_* prefixed to __dpd_* prefixed that
   GCC expects on the DPD targets
2) while testing that I've found some big-endian issues in the existing
   support
3) testing also revealed that in some cases __builtin_clzll (~msb) was
   called with msb set to all ones, so invoking UB; apparently on aarch64
   and x86 we were lucky and got some value that happened to work well,
   but that wasn't the case on s390x

For 1), the patch uses two ~ 2KB tables to speed up the decoding/encoding.
I haven't found such tables in what is added into libgcc.a, though they
are in libdecnumber/bid/bid2dpd_dpd2bid.h, but there they are just huge
and next to other huge tables - there is d2b which is like __dpd_d2bbitint
in the patch but it uses 64-bit entries rather than 16-bit, then there is
d2b2 with 64-bit entries like in d2b all multiplied by 1000, then d2b3
similarly multiplied by 1000000, then d2b4 similarly multiplied by
1000000000, then d2b5 similarly multiplied by 1000000000000ULL and
d2b6 similarly multipled by 1000000000000000ULL.  Arguably it can
save some of the multiplications, but on the other side accesses memory
which is unlikely in the caches, and the 2048 bytes in the patch vs.
24 times more for d2b is IMHO significant.
For b2d, libdecnumber/bid/bid2dpd_dpd2bid.h has again b2d table like
__dpd_b2dbitint in the patch, except that it has 64-bit entries rather
than 16-bit (this time 1000 entries), but then has b2d2 which has the
same entries shifted left by 10, then b2d3 shifted left by 20, b2d4 shifted
left by 30 and b2d5 shifted left by 40.  I can understand for d2b paying
memory cost to speed up multiplications, but don't understand paying
extra 4 * 8 * 1000 bytes (+ 6 * 1000 bytes for b2d not using ushort)
just to avoid shifts.

2025-05-27  Jakub Jelinek  <jakub@redhat.com>

	* config/t-softfp (softfp_bid_list): Don't guard with
	$(enable_decimal_float) == bid.
	* soft-fp/bitint.h (__bid_pow10bitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_pow10bitint.
	(__dpd_d2bbitint, __dpd_b2dbitint): Declare.
	* soft-fp/bitintpow10.c (__dpd_d2bbitint, __dpd_b2dbitint): New
	variables.
	* soft-fp/fixsdbitint.c (__bid_fixsdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixsdbitint.
	Add DPD support.  Fix big-endian support.
	* soft-fp/fixddbitint.c (__bid_fixddbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixddbitint.
	Add DPD support.  Fix big-endian support.
	* soft-fp/fixtdbitint.c (__bid_fixtdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixtdbitint.
	Add DPD support.  Fix big-endian support.
	* soft-fp/fixsdti.c (__bid_fixsdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixsdbitint.
	(__bid_fixsdti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_fixsdti.
	* soft-fp/fixddti.c (__bid_fixddbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixddbitint.
	(__bid_fixddti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_fixddti.
	* soft-fp/fixtdti.c (__bid_fixtdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixtdbitint.
	(__bid_fixtdti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_fixtdti.
	* soft-fp/fixunssdti.c (__bid_fixsdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixsdbitint.
	(__bid_fixunssdti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_fixunssdti.
	* soft-fp/fixunsddti.c (__bid_fixddbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixddbitint.
	(__bid_fixunsddti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_fixunsddti.
	* soft-fp/fixunstdti.c (__bid_fixtdbitint): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_fixtdbitint.
	(__bid_fixunstdti): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_fixunstdti.
	* soft-fp/floatbitintsd.c (__bid_floatbitintsd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintsd.
	Add DPD support.  Avoid calling __builtin_clzll with 0 argument.  Fix
	big-endian support.
	* soft-fp/floatbitintdd.c (__bid_floatbitintdd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintdd.
	Add DPD support.  Avoid calling __builtin_clzll with 0 argument.  Fix
	big-endian support.
	* soft-fp/floatbitinttd.c (__bid_floatbitinttd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitinttd.
	Add DPD support.  Avoid calling __builtin_clzll with 0 argument.  Fix
	big-endian support.
	* soft-fp/floattisd.c (__bid_floatbitintsd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintsd.
	(__bid_floattisd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_floattisd.
	* soft-fp/floattidd.c (__bid_floatbitintdd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintdd.
	(__bid_floattidd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_floattidd.
	* soft-fp/floattitd.c (__bid_floatbitinttd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitinttd.
	(__bid_floattitd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine to
	__dpd_floattitd.
	* soft-fp/floatuntisd.c (__bid_floatbitintsd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintsd.
	(__bid_floatuntisd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_floatuntisd.
	* soft-fp/floatuntidd.c (__bid_floatbitintdd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitintdd.
	(__bid_floatuntidd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_floatuntidd.
	* soft-fp/floatuntitd.c (__bid_floatbitinttd): For
	!defined(ENABLE_DECIMAL_BID_FORMAT) redefine to __dpd_floatbitinttd.
	(__bid_floatuntitd): For !defined(ENABLE_DECIMAL_BID_FORMAT) redefine
	to __dpd_floatuntitd.
2025-05-27 23:10:08 +02:00