diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc index 75655787202..d7d51550820 100644 --- a/gcc/simplify-rtx.cc +++ b/gcc/simplify-rtx.cc @@ -5857,11 +5857,11 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode, /* The shift count might be in SImode while int_mode might be narrower. On IA-64 it is even DImode. If the shift count is too large and doesn't fit into int_mode, we'd - ICE. So, if int_mode is narrower than word, use - word_mode for the shift count. */ + ICE. So, if int_mode is narrower than + HOST_BITS_PER_WIDE_INT, use DImode for the shift count. */ if (GET_MODE (op1) == VOIDmode - && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD) - pop1 = rtx_mode_t (op1, word_mode); + && GET_MODE_PRECISION (int_mode) < HOST_BITS_PER_WIDE_INT) + pop1 = rtx_mode_t (op1, DImode); wide_int wop1 = pop1; if (SHIFT_COUNT_TRUNCATED) @@ -5912,11 +5912,11 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode, /* The rotate count might be in SImode while int_mode might be narrower. On IA-64 it is even DImode. If the shift count is too large and doesn't fit into int_mode, we'd - ICE. So, if int_mode is narrower than word, use - word_mode for the shift count. */ + ICE. So, if int_mode is narrower than + HOST_BITS_PER_WIDE_INT, use DImode for the shift count. */ if (GET_MODE (op1) == VOIDmode - && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD) - pop1 = rtx_mode_t (op1, word_mode); + && GET_MODE_PRECISION (int_mode) < HOST_BITS_PER_WIDE_INT) + pop1 = rtx_mode_t (op1, DImode); if (wi::neg_p (pop1)) return NULL_RTX; @@ -6017,8 +6017,9 @@ simplify_const_binary_operation (enum rtx_code code, machine_mode mode, wide_int shift = rtx_mode_t (op1, GET_MODE (op1) == VOIDmode - && GET_MODE_PRECISION (int_mode) < BITS_PER_WORD - ? word_mode : mode); + && (GET_MODE_PRECISION (int_mode) + < HOST_BITS_PER_WIDE_INT) + ? DImode : mode); if (SHIFT_COUNT_TRUNCATED) shift = wi::umod_trunc (shift, GET_MODE_PRECISION (int_mode)); else if (wi::geu_p (shift, GET_MODE_PRECISION (int_mode))) diff --git a/gcc/testsuite/gcc.target/i386/pr123523.c b/gcc/testsuite/gcc.target/i386/pr123523.c new file mode 100644 index 00000000000..cd5a674c431 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr123523.c @@ -0,0 +1,24 @@ +/* PR rtl-optimization/123523 */ +/* { dg-do compile } */ +/* { dg-options "-O -mavx512vl -mavx512bw" } */ + +typedef __attribute__((__vector_size__ (16))) short V; +typedef __attribute__((__vector_size__ (32))) short W; + +char c; +W *p, *q; +short s; + +void +bar (V v, int, int, int, int, int, int, void *) +{ + W w = __builtin_ia32_psrlw256_mask ((W) { }, v, *p, 0); + short x = __builtin_ia32_pcmpgtw256_mask (w, *q, 0); + __builtin_mul_overflow (x, c, &s); +} + +void +foo () +{ + bar ((V){0, -14}, 0, 0, 0, 0, 0, 0, q); +}